Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) vs Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite)
Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) is faster in the only like-for-like comparison (largest gap: semantic segmentation, 1.96×).
| Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) | Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) | |
|---|---|---|
| Best semantic segmentation | 5.24 FPS D Older data (2020) | 10.26 FPS D 2026-08-10 (published) |
| Power | n/a | n/a |
| Perf / W | n/a | n/a |
| Price | n/a | n/a |
| Workloads with data | 1 of 7 | 3 of 7 |
Best published semantic segmentation result per platform (may be from different like-for-like groups — see data). n/a = not published; never estimated.
Show data — all workloads, sources and like-for-like groups
object detection
Only Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) has published object detection results.
| Platform | Result | Model · precision · stack | Grade | Power | Source |
|---|---|---|---|---|---|
| Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) | 117 FPS throughput · b=1 | yolo-v3-tiny-tf FP16 · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · unknown | D | unknown power n/a no power published | Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published) |
Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only):
No published object detection results for Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.
instance segmentation
No published instance segmentation results for Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.
pose estimation
No published pose estimation results for Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.
image classification
Only Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) has published image classification results.
| Platform | Result | Model · precision · stack | Grade | Power | Source |
|---|---|---|---|---|---|
| Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) | 1391 FPS throughput · b=1 | mobilenet-v1-1.0-224 not stated in table (set by .arch file) · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · mobile-class CNN | D | unknown power n/a no power published | Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published) |
Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only):
No published image classification results for Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.
semantic segmentation
| Platform | Result | Model · precision · stack | Grade | Power | Source |
|---|---|---|---|---|---|
| Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) | 10.26 FPS throughput · b=1 | unet-camvid-onnx-0001 not stated in table (set by .arch file) · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · mid-size CNN | D | unknown power n/a no power published | Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published) |
| Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) CPU-only | 5.24 FPS inference_time · b=1 | Unet Mv2 (128x128) TFLite on CPU · TensorFlow Lite C++ benchmark (Edge TPU runtime) · mid-size CNN | D | unknown power n/a no power published | Google Coral Edge TPU benchmarks page (Table 1) Older data (2020) |
speech-to-text
No published speech-to-text results for Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.
LLM generation
No published LLM generation results for Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.
Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) is faster in all 4 like-for-like comparisons (largest gap: image classification, 386×).
| Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) | Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) | |
|---|---|---|
| Best image classification | 8.20 FPS D Older data (2019) | 1391 FPS D 2026-08-10 (published) |
| Power | n/a | n/a |
| Perf / W | n/a | n/a |
| Price | n/a | n/a |
| Workloads with data | 3 of 7 | 3 of 7 |
Best published image classification result per platform (may be from different like-for-like groups — see data). n/a = not published; never estimated.
Show data — all workloads, sources and like-for-like groups
object detection
| Platform | Result | Model · precision · stack | Grade | Power | Source |
|---|---|---|---|---|---|
| Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) CPU-only | 3.55 FPS inference_time · b=1 | MobileNet v2 SSD (224x224) TFLite on CPU · TensorFlow Lite C++ benchmark (Edge TPU runtime) · mobile-class CNN | D | unknown power n/a no power published | Google Coral Edge TPU benchmarks page (Table 1) Older data (2019) |
| Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) MIXED: model-size class unknown vs mobile-class CNN | 117 FPS throughput · b=1 | yolo-v3-tiny-tf FP16 · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · unknown | D | unknown power n/a no power published | Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published) |
No shared like-for-like group exists for this pair.
instance segmentation
No published instance segmentation results for Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.
pose estimation
No published pose estimation results for Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.
image classification
| Platform | Result | Model · precision · stack | Grade | Power | Source |
|---|---|---|---|---|---|
| Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) | 220 FPS throughput · b=1 | resnet-50-tf not stated in table (set by .arch file) · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · mid-size CNN | D | unknown power n/a no power published | Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published) |
| Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) CPU-only | 0.570 FPS inference_time · b=1 | ResNet-50 V1 (299x299) TFLite on CPU · TensorFlow Lite C++ benchmark (Edge TPU runtime) · mid-size CNN | D | unknown power n/a no power published | Google Coral Edge TPU benchmarks page (Table 1) Older data (2019) |
| Platform | Result | Model · precision · stack | Grade | Power | Source |
|---|---|---|---|---|---|
| Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) | 1391 FPS throughput · b=1 | mobilenet-v1-1.0-224 not stated in table (set by .arch file) · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · mobile-class CNN | D | unknown power n/a no power published | Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published) |
| Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) CPU-only | 8.20 FPS inference_time · b=1 | MobileNet v2 (224x224) TFLite on CPU · TensorFlow Lite C++ benchmark (Edge TPU runtime) · mobile-class CNN | D | unknown power n/a no power published | Google Coral Edge TPU benchmarks page (Table 1) Older data (2019) |
| Platform | Result | Model · precision · stack | Grade | Power | Source |
|---|---|---|---|---|---|
| Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) | 1289 FPS throughput · b=1 | yolo-v8-nano classification not stated in table (set by .arch file) · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · unknown | D | unknown power n/a no power published | Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published) |
| Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) CPU-only | 4.31 FPS inference_time · b=1 | SqueezeNet (224x224) TFLite on CPU · TensorFlow Lite C++ benchmark (Edge TPU runtime) · unknown | D | unknown power n/a no power published | Google Coral Edge TPU benchmarks page (Table 1) Older data (2019) |
semantic segmentation
| Platform | Result | Model · precision · stack | Grade | Power | Source |
|---|---|---|---|---|---|
| Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) | 10.26 FPS throughput · b=1 | unet-camvid-onnx-0001 not stated in table (set by .arch file) · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · mid-size CNN | D | unknown power n/a no power published | Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published) |
| Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) CPU-only | 5.24 FPS inference_time · b=1 | Unet Mv2 (128x128) TFLite on CPU · TensorFlow Lite C++ benchmark (Edge TPU runtime) · mid-size CNN | D | unknown power n/a no power published | Google Coral Edge TPU benchmarks page (Table 1) Older data (2020) |
speech-to-text
No published speech-to-text results for Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.
LLM generation
No published LLM generation results for Coral Dev Board CPU (quad Cortex-A53 @1.5 GHz, CPU only) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.
How to read these numbers
Machine-readable: /find.json (see llms.txt); full tables are in “Show data”. Confidence grades: A audited MLPerf closed · B documented third-party · C community · D vendor-published · E estimate. Unknown values are shown as unknown, never estimated. Generated 2026-10-16 from public sources.