AMD Versal AI Edge VEK280 (VE2802) vs Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite)

FPGA / Versal coverage note: 1,243 rows come from the AMD Vitis AI 3.0/3.5 Model Zoo tables; 733 (59%) are image classification. Detection, segmentation and other workloads are thinner, and there is no LLM or speech data for these boards. All are vendor-published (grade D). FPGA / Versal overview.

AMDeval kit (adaptive SoC)No licensed photo yet

AlteraFPGA (PCIe/dev kit)No licensed photo yet

AMD Versal AI Edge VEK280 (VE2802) is faster in the only like-for-like comparison (largest gap: image classification, 1.53×).

	AMD Versal AI Edge VEK280 (VE2802)	Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite)
Best image classification	8598 FPS D Older data (2023)	1391 FPS D 2026-08-10 (published)
Power	n/a	n/a
Perf / W	n/a	n/a
Price	n/a	n/a
Workloads with data	4 of 7	3 of 7

Best published image classification result per platform (may be from different like-for-like groups — see data). n/a = not published; never estimated.

Show data — all workloads, sources and like-for-like groups

object detection

⚠ MIXED COMPARISON — not like-for-like. Baseline large (YOLO-l) at batch 14. Differs: model-size class unknown vs large (YOLO-l); batch 1 vs 14.

Platform	Result	Model · precision · stack	Grade	Power	Source
AMD Versal AI Edge VEK280 (VE2802)	164 FPS E2E throughput, multi thread · b=14	yolov5l_pt INT8 · Vitis AI 3.5 Library (VART), batch 14 DPU · large (YOLO-l)	D	unknown power n/a no power published	AMD UG1354 Vitis AI Library performance tables undated
Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) MIXED: model-size class unknown vs large (YOLO-l); batch 1 vs 14	117 FPS throughput · b=1	yolo-v3-tiny-tf FP16 · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · unknown	D	unknown power n/a no power published	Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published)

No shared like-for-like group exists for this pair.

instance segmentation

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No published instance segmentation results for AMD Versal AI Edge VEK280 (VE2802) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.

pose estimation

Only AMD Versal AI Edge VEK280 (VE2802) has published pose estimation results.

Platform	Result	Model · precision · stack	Grade	Power	Source
AMD Versal AI Edge VEK280 (VE2802)	428 FPS E2E throughput, multi thread · b=unknown	pt_movenet_3.5 INT8 · Vitis AI 3.5 (VART) · mobile-class CNN	D	unknown power n/a no power published	Vitis AI 3.5 Model Zoo performance table Older data (2023)

Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite):

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No published pose estimation results for Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) or AMD Versal AI Edge VEK280 (VE2802) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.

image classification

✓ Like-for-like: model-size class mid-size CNN, batch 1. Model, precision and stack may still differ.

Platform	Result	Model · precision · stack	Grade	Power	Source
AMD Versal AI Edge VEK280 (VE2802)	337 FPS throughput · b=1	resnet50 (TRD example xmodel) INT8 · Vitis AI 3.5 DPUCV2DX8G reference design, test_dpu_runner_mt · mid-size CNN	D	unknown power n/a no power published	Vitis AI 3.5 VEK280 DPUCV2DX8G reference design (ResNet50 example) Older data (2023)
Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite)	220 FPS throughput · b=1	resnet-50-tf not stated in table (set by .arch file) · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · mid-size CNN	D	unknown power n/a no power published	Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published)

semantic segmentation

⚠ MIXED COMPARISON — not like-for-like. Baseline mid-size CNN at batch 1. Differs: batch unknown vs 1.

Platform	Result	Model · precision · stack	Grade	Power	Source
Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite)	10.26 FPS throughput · b=1	unet-camvid-onnx-0001 not stated in table (set by .arch file) · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · mid-size CNN	D	unknown power n/a no power published	Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published)
AMD Versal AI Edge VEK280 (VE2802) MIXED: batch unknown vs 1	1564 FPS E2E throughput, multi thread · b=unknown	tf2_2D-UNET_3.5 INT8 · Vitis AI 3.5 (VART) · mid-size CNN	D	unknown power n/a no power published	Vitis AI 3.5 Model Zoo performance table Older data (2023)

No shared like-for-like group exists for this pair.

speech-to-text

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No published speech-to-text results for AMD Versal AI Edge VEK280 (VE2802) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.

LLM generation

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No published LLM generation results for AMD Versal AI Edge VEK280 (VE2802) or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.

How to read these numbers

Every number is labelled. Confidence: A MLPerf closed, audited · B documented third-party method · C community / review · D vendor-published, not independently verified · E estimate. Power basis: measured with the result · spec vendor spec/envelope · power n/a not published.

Machine-readable: /find.json (see llms.txt); full tables are in “Show data”. Confidence grades: A audited MLPerf closed · B documented third-party · C community · D vendor-published · E estimate. Unknown values are shown as unknown, never estimated. Generated 2026-10-16 from public sources.