AMD Versal AI Edge Series Gen 2 VEK385 vs Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite)

FPGA / Versal coverage note: 1,243 rows come from the AMD Vitis AI 3.0/3.5 Model Zoo tables; 733 (59%) are image classification. Detection, segmentation and other workloads are thinner, and there is no LLM or speech data for these boards. All are vendor-published (grade D). FPGA / Versal overview.

AMDeval kit (adaptive SoC)No licensed photo yet

AlteraFPGA (PCIe/dev kit)No licensed photo yet

AMD Versal AI Edge Series Gen 2 VEK385 is faster in the only like-for-like comparison (largest gap: image classification, 1.21×).

	AMD Versal AI Edge Series Gen 2 VEK385	Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite)
Best image classification	265 FPS D 2026-09-23 (page last edited)	1391 FPS D 2026-08-10 (published)
Power	n/a	n/a
Perf / W	n/a	n/a
Price	$15995 list	n/a
Workloads with data	2 of 7	3 of 7

Best published image classification result per platform (may be from different like-for-like groups — see data). n/a = not published; never estimated.

Show data — all workloads, sources and like-for-like groups

object detection

⚠ MIXED COMPARISON — not like-for-like. Baseline medium (YOLO-m) at batch 1. Differs: model-size class unknown vs medium (YOLO-m).

Platform	Result	Model · precision · stack	Grade	Power	Source
AMD Versal AI Edge Series Gen 2 VEK385	93.50 FPS throughput · b=1	yolov8m VINT8 with BF16 tail (Quark) · Vitis AI 6.3 VART ml_vart --benchmark --runs 100 · medium (YOLO-m)	D	unknown power n/a no power published	AMD Vitis AI 6.3 VEK385 YOLOv8m tutorial 2026-09-24 (published)
Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) MIXED: model-size class unknown vs medium (YOLO-m)	117 FPS throughput · b=1	yolo-v3-tiny-tf FP16 · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · unknown	D	unknown power n/a no power published	Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published)

No shared like-for-like group exists for this pair.

instance segmentation

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No published instance segmentation results for AMD Versal AI Edge Series Gen 2 VEK385 or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.

pose estimation

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No published pose estimation results for AMD Versal AI Edge Series Gen 2 VEK385 or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.

image classification

✓ Like-for-like: model-size class mid-size CNN, batch 1. Model, precision and stack may still differ.

Platform	Result	Model · precision · stack	Grade	Power	Source
AMD Versal AI Edge Series Gen 2 VEK385	265 FPS throughput · b=1	resnet50-v1-12 (ONNX) INT8 (Quark) · Vitis AI 6.3 ONNX Runtime Vitis AI EP (evaluate.py, Python loop) · mid-size CNN	D	unknown power n/a no power published	AMD Vitis AI 6.3 VEK385 ResNet50 Quark tutorial 2026-09-23 (page last edited)
Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite)	220 FPS throughput · b=1	resnet-50-tf not stated in table (set by .arch file) · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · mid-size CNN	D	unknown power n/a no power published	Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published)

semantic segmentation

Only Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) has published semantic segmentation results.

Platform	Result	Model · precision · stack	Grade	Power	Source
Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite)	10.26 FPS throughput · b=1	unet-camvid-onnx-0001 not stated in table (set by .arch file) · FPGA AI Suite 2026.1.1 / OpenVINO; IP throughput (hostless) · mid-size CNN	D	unknown power n/a no power published	Altera FPGA AI Suite Handbook (performance tables) 2026-08-10 (published)

AMD Versal AI Edge Series Gen 2 VEK385:

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No published semantic segmentation results for AMD Versal AI Edge Series Gen 2 VEK385 or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.

speech-to-text

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No published speech-to-text results for AMD Versal AI Edge Series Gen 2 VEK385 or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.

LLM generation

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No published LLM generation results for AMD Versal AI Edge Series Gen 2 VEK385 or Terasic DE10-Agilex Development Board (Agilex 7, FPGA AI Suite) yet.
We only show cited public figures — nothing is estimated to fill gaps. Requests tell us what to source or test next.

How to read these numbers

Every number is labelled. Confidence: A MLPerf closed, audited · B documented third-party method · C community / review · D vendor-published, not independently verified · E estimate. Power basis: measured with the result · spec vendor spec/envelope · power n/a not published.

Machine-readable: /find.json (see llms.txt); full tables are in “Show data”. Confidence grades: A audited MLPerf closed · B documented third-party · C community · D vendor-published · E estimate. Unknown values are shown as unknown, never estimated. Generated 2026-10-16 from public sources.